
// Open Role at Intel
Join Intel's E-core CPU Technology team as a Design Automation Engineer, developing cutting-edge tools and methodologies for high-performance CPU designs that power next-gen laptops, AI devices, and 5G communications.
E-core (formerly known as ATOM), Intel's most efficient CPU Technology team is looking for a highly motivated and technically savvy experienced individual to join our team as Design Automation Engineer. Intel has a vision to create and extend computing technology to connect and enrich the lives of every person. We are designing future generations of high-performance E-core CPUs using the most advanced and innovative process technologies. If you are looking to grow and develop your skillsets while being surrounded by highly motivated and knowledgeable teammates, then this is the organization for you.
E-Core CPUs are the industry-leading performance-per-watt CPU that helps:
As a CPU Physical Design Automation Engineer in the E-core CPU group, you will be responsible for:
Minimum Qualifications
Bachelor's Degree in Computer Engineering and/or Electrical/Electronic Engineering and 1+ years of relevant working experience OR Master's Degree in Computer Engineering and/or Electrical/Electronic Engineering
Fresh Graduate is welcome to apply.
Preferred Qualifications
1+ years of experience in VLSI, design automation algorithms, and transistor-level design.
1+ years of experience using industry standard Engineering Design Automation (EDA) VLSI tools/flows from vendors such as Synopsys, Cadence and/or Mentor Graphics for performing synthesis, place-and-route, extraction, timing/power analysis and functional verification.
1+ years' experience with Python, Perl, and/or Tcl scripting languages.
1+ years of relevant working experience in microprocessor or other high speed design backend design.
Experience with timing closure methodology for worst-case corner (static timing analysis / STA, statistical variation analysis, spice circuit simulation, ERC, noise analysis flows, cross talk, OCV effects, budget constraints)
Experienced Hire
Shift 1 (Malaysia)
Malaysia, Penang
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
• Bachelor's Degree in Computer Engineering and/or Electrical/Electronic Engineering with 1+ years of relevant experience OR Master's Degree in Computer Engineering and/or Electrical/Electronic Engineering. • Preferred: 1+ years of experience in VLSI, design automation algorithms, and transistor-level design. • Preferred: 1+ years of experience using industry standard Engineering Design Automation (EDA) VLSI tools/flows (e.g., Synopsys, Cadence, Mentor Graphics) for synthesis, place-and-route, extraction, timing/power analysis, and functional verification. • Preferred: 1+ years' experience with Python, Perl, and/or Tcl scripting languages. • Preferred: 1+ years of relevant working experience in microprocessor or other high-speed design backend design. • Experience with timing closure methodology for worst-case corners (STA, statistical variation analysis, spice circuit simulation, ERC, noise analysis flows, cross talk, OCV effects, budget constraints). • Excellent verbal and written English communication skills.