Untitled Position

- US Citizenship required - Ability to obtain a US Government Security Clearance - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM-related field of study - 4+ years of experience with advanced CMOS processes (22nm and below) - 3+ years of experience in ASIC physical design implementation and/or ASIC design signoff (SoC/ASIC) - 3+ years of experience in one of the following scripting languages: Python, Perl, Tcl, shell scripting - Preferred: Active US Government Security Clearance with a minimum of Secret level - Preferred: Post Graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study - Preferred: Customer-facing experience in technical support roles - Preferred: Experience with state-of-the-art process technology (7nm and below) - Preferred: Hands-on experience in Cadence EDA-based ASIC design implementation including full-chip integration, synthesis, APR, static timing analysis, layout verification, and reliability verification - Preferred: Proficiency with Cadence EDA tools and flows: Innovus, Tempus, TempusECO, Pegasus, Voltus - Preferred: Experience with Synopsys tools (Fusion Compiler, PrimeTime, Prime ECO, ICV) is a plus - Preferred: Experience with hierarchical and multi-voltage domain design, top-down design, budgeting, and correlation across implementation and verification tools